This invention relates to a digital to analog multistage scrambler and more particularly to such a scrambler which transforms harmonic distortion to colored noise and then toward lower power white noise.
Digital to analog converters (DAC""s) employ a number of unary elements to convert digital inputs to analog signals. For example, in a current output DAC, ideally each unary element outputs the same current in response to a bit and the accumulation of those currents constructs the precise current required to convert the digital input to the corresponding analog output. Actually the unary elements do not all produce the same current in response to a bit: some produce slightly higher currents, some lower. These errors accumulate in multibit digital codes resulting in non-ideal transfer functions; different types of non-ideal transfer functions such as bow type and xe2x80x9csxe2x80x9d type can lead to different types of harmonic distortions. To combat this a number of different scramblers are used that vary the unary elements called to respond to incoming bits. In data directed scramblers directional switches or swappers are enabled as a function of present and previous data processed. These systems are mainly used in over sampled systems and they reposition the harmonic energy as out of band noise rather than reduce it toward white noise over the whole nyquist bandwidth. U.S. Pat. Nos. 5,404,142; 6,124,813. A constant element activity scrambler operates to assure that each element will be used the same amount over time as all other elements using a look-up table/counter to keep a tally of how many times each unary element has been used. This approach is hardware intensive as a history must be kept of the use of each element. Barrel shifter or constant element rotation scramblers use successive sets of elements in a rotating pattern to reduce harmonic energy by shifting or modulating the harmonics by the frequency of rotation. See U.S. Pat. No. 4,791,406. One problem with this approach is that the error tones or harmonics are moved but not necessarily reduced. Segment swapping scramblers, such as disclosed in Fujitsu Data Sheet MB86060, only partially reduce the noise and only partially reposition it toward low frequency.
It is therefore an object of this invention to provide an improved scrambler for a digital to analog converter.
It is a further object of this invention to provide such an improved scrambler for a digital to analog converter which does not reposition but transforms the energy of harmonic distortion to colored noise and then toward lower power white noise.
It is a further object of this invention to provide such an improved scrambler for a digital to analog converter which is hardware efficient.
It is a further object of this invention to provide such an improved scrambler for a digital to analog converter which addresses all types of error functions.
The invention results from the realization that an improved scrambler for a digital to analog converter having a non-ideal transfer function resulting from an error function that causes harmonic distortion, which addresses all types of error functions with greater hardware efficiency, can be effected by employing a plurality of stages including one shuffling network to reduce the harmonic distortion to lower magnitude colored noise and at least a second shuffling network to transform the colored noise toward lower power white noise.
This invention features a multistage scrambler for a digital to analog converter having a non-ideal transfer function resulting from an error function which causes harmonic distortion. The scrambler includes a first shuffling network having a first input for receiving digital data and a first output. The first shuffling network includes a first set of data switches. There is a first sequence generator for selectively interconnecting the first set of data switches to reorder at the first output the digital data received at the first input to reduce the harmonic distortion to lower magnitude colored noise. A second shuffling network has a second input for receiving the reordered digital data from the first output and a second output. The second shuffling network includes a second set of data switches. A second sequence generator selectively interconnects the second set of data switches to reorder at the second output the digital data received at the second input to transform the colored noise toward lower power white noise.
In a preferred embodiment the first sequence generator may include a pseudo random number generator. The pseudo random number generator may be a maximal length pseudo random generator. The number of taps on the maximal length pseudo random number generator may be a prime number. The second sequence generator may include a pseudo random number generator. That pseudo random number generator may be a maximal length pseudo random number generator. And the number of taps on that maximal length pseudo random number generator may be a prime number. The sequence generators may have an equal number of taps or one of them may have more taps than the other. The first and second sequence generators may produce a maximal length cross correlation sequence. Each of the first and second sequence generators may include a linear feedback shift register, the linear feedback shift registers may produce a maximal length sequence.